Intel® Desktop Board

DQ67OW

Technical Product Specification

February 2010

Order Number: G15483-001US

The Intel^® Desktop Board DQ67OW may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata are documented in the Intel Desktop Board DQ67OW Specification Update.

Revision History

Revision

Revision History

Date

-001

First release of the Intel^® Desktop Board DQ67OW Technical Product

Specification

February 2010

This product specification applies to only the standard Intel^® Desktop Board DQ67OW with BIOS identifier SWQ6710H.86A.

Changes to this specification will be published in the Intel Desktop Board DQ67OW Specification Update before being incorporated into a revision of this document.

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Preface

This Technical Product Specification (TPS) specifies the board layout, components, connectors, power and environmental requirements, and the BIOS for the Intel^® Desktop Board DQ67OW.

Intended Audience

The TPS is intended to provide detailed, technical information about the Intel Desktop Board DQ67OW and its components to the vendors, system integrators, and other engineers and technicians who need this level of information. It is specifically not intended for general audiences.

What This Document Contains

Chapter	Description
1	A description of the hardware used on the Intel Desktop Board DQ67OW
2	A map of the resources of the Intel Desktop Board
3	The features supported by the BIOS Setup program
4	A description of the BIOS error messages, beep codes, and POST codes
5	Regulatory compliance and battery disposal information

Typographical Conventions

This section contains information about the conventions used in this specification. Not all of these symbols and abbreviations appear in all specifications of this type.

Notes, Cautions, and Warnings

NOTE

Notes call attention to important information.

CAUTION

Cautions are included to help you avoid damaging hardware or losing data.

Other Common Notation

#	Used after a signal name to identify an active-low signal (such as USBP0#)
GB	Gigabyte (1,073,741,824 bytes)
GB/s	Gigabytes per second
Gb/s	Gigabits per second
KB	Kilobyte (1024 bytes)
Kbit	Kilobit (1024 bits)
kbits/s	1000 bits per second
MB	Megabyte (1,048,576 bytes)
MB/s	Megabytes per second
Mbit	Megabit (1,048,576 bits)
Mbits/s	Megabits per second
xxh	An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V	Volts. Voltages are DC unless otherwise specified.
*	This symbol is used to indicate third-party brands and names that are the property of their respective owners.

Contents

1 Product Description

1.1 Overview..........................................................................................9

1.1.1 Feature Summary ..................................................................9

1.1.2 Board Layout....................................................................... 11

1.1.3 Block Diagram ..................................................................... 13

1.2 Legacy Considerations...................................................................... 14

1.3 Online Support................................................................................ 14

1.4 Processor....................................................................................... 14

1.5 Intel^® Q67 Express Chipset............................................................... 15

1.6 System Memory.............................................................................. 15

1.6.1 Memory Configurations ......................................................... 16

1.7 Graphics Subsystem ........................................................................ 18

1.7.1 Integrated Graphics.............................................................. 18

1.7.2 PCI Express x16 Graphics...................................................... 18

1.8 USB............................................................................................... 19

1.9 SATA Interfaces .............................................................................. 20

1.10 Legacy I/O Controller....................................................................... 21

1.10.1 Serial Port........................................................................... 21

1.11 Audio Subsystem............................................................................. 22

1.11.1 Audio Subsystem Software .................................................... 22

1.11.2 Audio Headers and Connectors............................................... 22

1.12 LAN Subsystem............................................................................... 24

1.12.1 Intel^® 82579LM Gigabit Ethernet Controller.............................. 24

1.12.2 LAN Subsystem Software....................................................... 24

1.12.3 RJ-45 LAN Connector with Integrated LEDs.............................. 25

1.13 Real-Time Clock Subsystem.............................................................. 26

1.14 Thermal Monitoring.......................................................................... 27

1.15 Platform Management and Security.................................................... 28

1.15.1 Hardware Management Subsystem ......................................... 281.15.2Hardware Monitoring............................................................. 28

1.15.3Intel^® vPro™ Technology....................................................... 29

1.16 Power Management ......................................................................... 33

1.16.1 ACPI................................................................................... 341.16.2Hardware Support................................................................ 37

2 Technical Reference

2.1 Memory Resources .......................................................................... 41

2.1.1 Addressable Memory............................................................. 41

2.1.2 Memory Map........................................................................ 43

2.2 Connectors and Headers................................................................... 43

2.2.1 Back Panel Connectors.......................................................... 44

2.2.2 Component-side Connectors and Headers................................ 45

2.3 BIOS Configuration Jumper Block....................................................... 56

2.4 Intel^® Management Engine BIOS Extension (Intel^® MEBX)

Reset Header.................................................................................. 58

2.5 Mechanical Considerations................................................................ 59

2.5.1 Form Factor......................................................................... 59

2.6 Electrical Considerations................................................................... 60

2.6.1 Power Supply Considerations ................................................. 60

2.6.2 Fan Header Current Capability................................................ 61

2.6.3 Add-in Board Considerations.................................................. 61

2.7 Thermal Considerations.................................................................... 62

2.8 Reliability....................................................................................... 642.9Environmental ................................................................................ 64

3 Overview of BIOS Features

3.1 Introduction ................................................................................... 65

3.2 System Management BIOS (SMBIOS)................................................. 673.3Legacy USB Support ........................................................................ 67

3.4BIOS Updates................................................................................. 68

3.2.1 Language Support................................................................ 68

3.2.2 Custom Splash Screen .......................................................... 69

3.5 BIOS Recovery................................................................................ 69

3.6 Boot Options................................................................................... 70

3.6.1 Optical Drive Boot ................................................................ 70

3.6.2 Network Boot....................................................................... 70

3.6.3 Booting Without Attached Devices........................................... 70

3.6.4 Changing the Default Boot Device During POST ........................ 70

3.7Hard Disk Drive Password Security Feature ......................................... 713.8BIOS Security Features .................................................................... 72

4 Error Messages and Beep Codes

4.1 Speaker......................................................................................... 75

4.2 BIOS Beep Codes ............................................................................ 75

4.3 Front-panel Power LED Blink Codes.................................................... 764.4BIOS Error Messages ....................................................................... 764.5Port 80h POST Codes....................................................................... 77

5 Regulatory Compliance and Battery Disposal Information

5.1 Regulatory Compliance..................................................................... 83

5.1.1 Safety Standards.................................................................. 83

5.1.2 European Union Declaration of Conformity Statement................ 84

5.1.3 Product Ecology Statements................................................... 85

5.1.4 EMC Regulations .................................................................. 87

5.1.5 ENERGY STAR* 5.0, e-Standby, and ErP Compliance................. 90

5.1.6 Regulatory Compliance Marks (Board Level)............................. 91

5.2 Battery Disposal Information............................................................. 92

Contents

Figures

Major Board Components.................................................................. 11
Block Diagram ................................................................................ 13
Memory Channel and DIMM Configuration........................................... 17
Back Panel Audio Connector Options .................................................. 23
LAN Connector LED Locations............................................................ 25
Thermal Sensors and Fan Headers..................................................... 27
Location of the Standby Power LED (Green) ........................................ 408. Detailed System Memory Address Map ............................................... 42
1. Back Panel Connectors..................................................................... 44
2. Component-side Connectors and Headers ........................................... 45
3. Connection Diagram for Front Panel Header ........................................ 53
4. Connection Diagram for Front Panel USB Headers ................................ 55
5. Location of the Jumper Block............................................................. 5614. Intel MEBX Reset Header.................................................................. 5815. Board Dimensions ........................................................................... 59

16. Localized High Temperature Zones..................................................... 63

Tables

Feature Summary..............................................................................9
Components Shown in Figure 1 ......................................................... 12
Supported Memory Configurations ..................................................... 16
LAN Connector LED States................................................................ 25
Effects of Pressing the Power Switch .................................................. 34
Power States and Targeted System Power........................................... 35
Wake-up Devices and Events ............................................................ 36
System Memory Map ....................................................................... 43
Component-side Connectors and Headers Shown in Figure 10................ 46
Serial Port Header ........................................................................... 4711. S/PDIF Header................................................................................ 47

12. Internal Mono Speaker Header.......................................................... 4713. Front Panel Audio Header for Intel HD Audio........................................ 4714. Front Panel Audio Header for AC ’97 Audio.......................................... 4815. Front Panel USB Header ................................................................... 48

16. SATA Connectors............................................................................. 4817. Chassis Intrusion Header.................................................................. 48

Processor (4-Pin) Fan Header............................................................ 49
Front and Rear Chassis Fan Headers .................................................. 49
Intel FCFH Header........................................................................... 49
Diskette Drive Connector.................................................................. 50
Processor Core Power Connector........................................................ 52
Main Power Connector...................................................................... 52
Front Panel Header.......................................................................... 5325. States for a One-Color Power LED...................................................... 54
Alternate Front Panel Power LED Header............................................. 54
BIOS Setup Configuration Jumper Settings.......................................... 57

vii

Intel MEBX Reset Header Signals....................................................... 58
Recommended Power Supply Current Values....................................... 60
Fan Header Current Capability........................................................... 61
Thermal Considerations for Components............................................. 63
Environmental Specifications............................................................. 64
BIOS Setup Program Menu Bar.......................................................... 66
BIOS Setup Program Function Keys.................................................... 66
Acceptable Drives/Media Types for BIOS Recovery ............................... 69
Boot Device Menu Options ................................................................ 70
Master Key and User Hard Drive Password Functions ............................ 71
Supervisor and User Password Functions............................................. 73
BIOS Beep Codes ............................................................................ 75
Front-panel Power LED Blink Codes.................................................... 76
BIOS Error Messages ....................................................................... 76
Port 80h POST Code Ranges.............................................................. 7743. Port 80h POST Codes....................................................................... 78
Typical Port 80h POST Sequence........................................................ 82
Safety Standards............................................................................. 83
EMC Regulations ............................................................................. 87
Regulatory Compliance Marks............................................................ 91

1 Product Description

1.1 Overview

1.1.1 Feature Summary

Table 1 summarizes the major features of the board. Table 1. Feature Summary

Form Factor	MicroATX (9.60 inches by 9.60 inches [243.84 millimeters by 243.84 millimeters])
Processor	•Intel^® Core™ i7, Intel^® Core™ i5, Intel^® Core™ i3, and Intel^® Pentium^® processors in an LGA1155 socket with up to 95 W TDP: ―Integrated graphics processing (processors with Intel^® Graphics Technology) ―External graphics interface controller ―Integrated memory controller
Chipset	Intel^® Q67 Express Chipset consisting of the Intel^® Q67 Platform Controller Hub (PCH)
Memory	Four 240-pin DDR3 SDRAM Dual Inline Memory Module (DIMM) sockets Support for DDR3 1333 MHz and DDR3 1066 MHz DIMMs Support for 1 Gb, 2 Gb, and 4 Gb memory technology Support for up to 32 GB of system memory with four DIMMs using 4 Gb memory technology Support for non-ECC memory
Graphics	Integrated graphics support for processors with Intel^® Graphics Technology: ―VGA ―DVI-D Discrete graphics support for PCI Express 2.0 x16 add-in graphics card
Audio	•Intel^® High Definition Audio: ―Realtek* ALC888S audio codec ―S/PDIF audio header ―Front panel audio header ―Mono speaker header

continued

Table 1. Feature Summary (continued)

Peripheral Interfaces	Fourteen USB ports: ―Six USB 2.0 ports are implemented with stacked back panel connectors (black) ―Eight USB 2.0 front panel ports are implemented through four dual-port internal headers Six SATA interfaces through the Intel Q67 Express Chipset with Intel^® Rapid Storage Technology RAID support: ―Two internal SATA 6 Gb/s ports (blue) ―Two internal SATA 3 Gb/s ports (black) ―Two internal eSATA 3 Gb/s ports (red) One serial port header One diskette drive connector One parallel port connector on the back panel One PS/2* keyboard/mouse port on back panel
Legacy I/O Control	•Nuvoton* W83677HG-i Super I/O controller for hardware management and serial port, parallel port, PS/2, and diskette drive support
BIOS	Intel^® BIOS resident in the SPI Flash device Support for Advanced Configuration and Power Interface (ACPI), Plug and Play, and SMBIOS
Instantly Available PC Technology	Support for PCI* Local Bus Specification Revision 2.2 Support for PCI Express* Suspend to RAM support Wake on Conventional PCI, PCI Express, LAN, front panel, serial, PS/2, and USB ports
LAN Support	Gigabit (10/100/1000 Mbits/s) LAN subsystem using the Intel^® 82579LM Gigabit Ethernet Controller
Expansion Capabilities	One PCI Express 2.0 x16 add-in card connector One PCI Express 2.0 x4 add-in card connector One PCI Express 2.0 x1 add-in card connector One Conventional PCI bus connector
Hardware Monitor Subsystem	Hardware monitoring through the Nuvoton Super I/O controller Voltage sense to detect out of range power supply voltages Thermal sense to detect out of range thermal values Three fan headers Two fan sense inputs used to monitor fan activity Fan speed control
Intel^®vPro™ Technology	Intel^®Active Management Technology (Intel^® AMT) 7.0 Intel^®Trusted Execution Technology (Intel^®TXT) Intel^® Fast Call for Help (Intel^® FCFH) Intel^® Virtualization Technology (Intel^® VT) Intel^® Virtualization for Directed I/O (Intel^® VT-d) KVM Remote Control

1.1.2 Board Layout

Figure 1 shows the location of the major components on Intel Desktop Board DQ67OW.

Figure 1. Major Board Components

Table 2 lists the components identified in Figure 1.

Table 2. Components Shown in Figure 1

Item/callout from Figure 1	Description
A	Conventional PCI bus add-in card connector
B	Front panel audio header
C	PCI Express x4 add-in card connector
D	Internal mono speaker header
E	PCI Express x1 add-in card connector
F	PCI Express x16 add-in card connector
G	Back panel connectors
H	12 V internal power connector (ATX12V)
I	LGA1155 processor socket
J	Processor fan header
K	DIMM 3 (Channel A DIMM 0)
L	DIMM 1 (Channel A DIMM 1)
M	DIMM 4 (Channel B DIMM 0)
N	DIMM 2 (Channel B DIMM 1)
O	Serial port header
P	Battery
Q	Chassis intrusion header
R	Diskette drive connector
S	Front chassis fan header
T	Main power connector (2 x 12)
U	Standby power LED
V	Piezoelectric speaker
W	Intel Q67 Express Chipset
X	Alternate front panel power LED header
Y	Front panel header
Z	SATA connectors (two 6 Gb/s SATA ports (blue), two 3 Gb/s SATA ports (black), and two 3 Gb/s eSATA ports (red))
AA	Intel^® Management Engine BIOS Extension (Intel^® MEBX) Reset header
BB	BIOS setup configuration jumper block
CC	Intel Fast Call for Help (Intel FCFH) header
DD	Front panel USB headers (4)
EE	S/PDIF header
FF	Rear chassis fan header

1.1.3 Block Diagram

Figure 2 is a block diagram of the major functional areas of the board.

Figure 2. Block Diagram

1.2 Legacy Considerations

This board differs from other Intel Desktop Board products, with specific changes including (but not limited to) the following: • No Parallel ATA (PATA) IDE drive connector

1.3 Online Support

1.4 Processor

The board is designed to support the Intel Core i7, Intel Core i5, Intel Core i3, and Intel Pentium processors in an LGA1155 socket.

Other processors may be supported in the future. This board is designed to support processors with a maximum TDP of 95 W. See the Intel web site listed below for the most up-to-date list of supported processors.

For information about… Refer to:

Supported processors

Use only the processors listed on the web site above. Use of unsupported processors can damage the board, the processor, and the power supply.

NOTE

This board has specific requirements for providing power to the processor. Refer to

Section 2.6.1 on page 60 for information on power supply requirements for this board.

1.5 Intel^® Q67 Express Chipset

The Intel Q67 Express Chipset consisting of the Intel Q67 Platform Controller Hub (PCH) provides interfaces to the processor and the USB, SATA, LPC, audio, network, display, Conventional PCI, and PCI Express. The PCH is a centralized controller for the board’s I/O paths.

For information about Refer to


Resources used by the chipset	Chapter 2

1.6 System Memory

The board has four DIMM sockets and supports the following memory features:

Two independent memory channels with interleaved mode support
Supports 1.2 V – 1.8 V DIMM memory voltage
Support for non-ECC, unbuffered, single-sided or double-sided DIMMs with x8 organization
32 GB maximum total system memory (with 4 Gb memory technology). Refer to Section 2.1.1 on page 41 for information on the total amount of addressable memory.
Minimum total system memory: 1 GB using 1 Gb x8 module
Serial Presence Detect
DDR3 1333 MHz and DDR3 1066 MHz SDRAM DIMMs

NOTE

To be fully compliant with all applicable DDR SDRAM memory specifications, the board should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure. This allows the BIOS to read the SPD data and program the chipset to accurately configure memory settings for optimum performance. If non-SPD memory is installed, the BIOS will attempt to correctly configure the memory settings, but performance and reliability may be impacted or the DIMMs may not function under the determined frequency.

Table 3 lists the supported DIMM configurations.

Table 3. Supported Memory Configurations

DIMM Capacity	Configuration ^(Note)	SDRAM Density	SDRAM Organization Front-side/Back-side	Number of SDRAM Devices
512 MB	SS	1 Gbit	64 M x16/empty	4
1024 MB	SS	1 Gbit	128 M x8/empty	8
1024 MB	SS	2 Gbit	128 M x16/empty	4
2048 MB	DS	1 Gbit	128 M x8/128 M x8	16
2048 MB	SS	2 Gbit	128 M x16/empty	8
4096 MB	DS	2 Gbit	256 M x8/256 M x8	16
8192 MB	DS	4 Gbit	512 M x8/512 M x8	16

Note: “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers to

single-sided memory modules (containing one row of SDRAM).

For information about… Refer to:

Tested Memory

1.6.1 Memory Configurations

The Intel Core i7, Intel Core i5, Intel Core i3, and Intel Pentium processors support the following types of memory organization:

Dual channel (Interleaved) mode. This mode offers the highest throughput for real world applications. Dual channel mode is enabled when the installed memory capacities of both DIMM channels are equal. Technology and device width can vary from one channel to the other but the installed memory capacity for each channel must be equal. If different speed DIMMs are used between channels, the slowest memory timing will be used.
Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth operation for real world applications. This mode is used when only a single DIMM is installed or the memory capacities are unequal. Technology and device width can vary from one channel to the other. If different speed DIMMs are used between channels, the slowest memory timing will be used.

Refer to:

Figure 3 illustrates the memory channel and DIMM configuration.

Figure 3. Memory Channel and DIMM Configuration

1.7 Graphics Subsystem

The board supports system graphics through either Intel Graphics Technology or a PCI Express 2.0 x16 add-in graphics card.

1.7.1 Integrated Graphics

The board supports integrated graphics through the Intel^® Flexible Display Interface (Intel^® FDI) for processors with Intel Graphics Technology.

NOTE

If using a processor with integrated graphics, the board will support only two of the integrated graphics interfaces simultaneously: DisplayPort, DVI-I, DVI-D.

NOTE

The board will support up to two integrated graphics interfaces plus one PCI Express Graphics card simultaneously with required changes to the BIOS setup.

1.7.1.1 Analog Display (VGA)

The VGA port supports analog displays. The maximum supported resolution is 2048 x 1536 (QXGA) at a 75 Hz refresh rate. The VGA port is enabled for POST whenever a monitor is attached, regardless of the DVI-D connector status.

1.7.1.2 Digital Visual Interface (DVI-D)

The DVI-D port supports only digital DVI displays. The maximum supported resolution is 2048 x 1536 at 75 Hz refresh (QXGA). The DVI-D port is compliant with the DVI 1.0 specification.

1.7.2 PCI Express x16 Graphics

The Intel Core i7, Intel Core i5, Intel Core i3, and Intel Pentium processors in an LGA1155 socket support discrete add in graphics cards through the PCI Express 2.0 x16 graphics connector:

Supports PCI Express GEN2 frequency of 2.5 GHz resulting in 5.0 Gb/s each direction (500 MB/s) per lane. Maximum theoretical bandwidth on interface is 8 GB/s in each direction, simultaneously, when operating in x16 mode.
Supports PCI Express GEN1 frequency of 1.25 GHz resulting in 2.5 Gb/s each direction (250 MB/s) per lane. Maximum theoretical bandwidth on interface is

4 GB/s in each direction, simultaneously, when operating in x16 mode.

Refer to

1.8 USB

The board supports up to 14 USB 2.0 ports. The Intel Q67 Express Chipset provides the USB controller for the 2.0 ports. The port arrangement is as follows:

•Six USB 2.0 ports are implemented with stacked back panel connectors • Eight USB 2.0 front panel ports implemented through four internal headers All 14 USB ports are high-speed, full-speed, and low-speed capable.

NOTES

Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements, even if no device is attached to the cable. Use a shielded cable that meets the requirements for full-speed devices.

For information about Refer to

The location of the USB connectors on the back panel	Figure 9, page 44
The location of the front panel USB headers	Figure 10, page 45

1.9 SATA Interfaces

The board provides six SATA connectors through the PCH, which support one device per connector:

Two internal SATA 6 Gb/s ports (blue)
Two internal SATA 3 Gb/s ports (black)
Two internal eSATA 3 Gb/s ports for external connectivity (red)

The PCH provides independent SATA ports with a theoretical maximum transfer rate of 6 Gb/s for two ports and 3 Gb/s for four ports. A point-to-point interface is used for host to device connections.

The underlying SATA functionality is transparent to the operating system. The SATA controller can operate in both legacy and native modes. In legacy mode, standard IDE I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard PCI Conventional bus resource steering is used. Native mode is the preferred mode for configurations using the Windows* XP, Windows Vista*, and Windows 7* operating systems.

For more information, see:

1.9.1.1 Serial ATA RAID

The board supports the Intel Rapid Storage Technology (Intel RST) which provides the following RAID (Redundant Array of Independent Drives) levels:

RAID 0 - data striping
RAID 1 - data mirroring
RAID 0+1 (or RAID 10) - data striping and mirroring
RAID 5 - distributed parity

NOTE

In order to use supported RAID features, you must first enable RAID in the BIOS. Also, during Microsoft Windows XP installation, you must press F6 to install the RAID drivers. See your Microsoft Windows XP documentation for more information about installing drivers during installation. Both Microsoft Windows Vista and Microsoft Windows 7 include the necessary RAID drivers for both AHCI and RAID without the need to install separate RAID drivers using the F6 switch in the operating system installation process.

1.9.1.2 Intel^® Rapid Recover Technology

The board incorporates the Intel^® Rapid Recover Technology (Intel^® RRT). Intel Rapid

Recover Technology is a feature of Intel Rapid Storage Technology. It uses RAID 1 (mirroring) functionality to copy data from a designated master drive to a designated recovery drive. The master drive data can be copied to the recovery drive either continuously or on request.

When using the continuous update policy, changes made to the data on the master drive while the recovery drive is disconnected or offline are automatically copied to the recovery drive when it is reconnected. When using the on request update policy, the master drive data can be restored to a previous state by copying the data on the recovery drive back to the master drive.

For information about Refer to

Intel Rapid Recovery Technology

1.10Legacy I/O Controller

The Legacy I/O Controller provides the following features:

One serial port
One back panel parallel port (with Extended Capabilities Port (ECP) and Enhanced Parallel Port (EPP) support
One diskette drive connector
PS/2-style keyboard/mouse interface on the back panel
Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems
Intelligent power management, including a programmable wake-up event interface
PCI Conventional bus power management support

The BIOS Setup program provides configuration options for the Legacy I/O controller.

1.10.1 Serial Port

For information about	Refer to
The location of the serial port header	Figure 10, page 45

The serial port is implemented as a 10-pin header on the board. The serial port supports data transfers at speeds up to 115.2 kbits/s with BIOS support.

1.11Audio Subsystem

The board supports Intel High Definition Audio through the Realtek ALC888S audio codec interface.

The Realtek ALC888S-based audio subsystem supports the following features:

8-channel audio with independent multi-streaming stereo.
Advanced jack sense for the back panel audio jacks that enables the audio codec to recognize the device that is connected to an audio port. The back panel audio jacks are capable of retasking according to the user’s definition, or can be automatically switched depending on the recognized device type.
Stereo input and output through back panel jacks
Headphone and Mic in functions for front panel audio jacks
S/PDIF audio header
A signal-to-noise (S/N) ratio of 90 dB

1.11.1 Audio Subsystem Software

Audio software and drivers are available from Intel’s World Wide Web site.

For information about Refer to

Obtaining audio software and drivers

1.11.2 Audio Headers and Connectors

The board contains audio connectors and headers on both the back panel and the component side of the board. The component-side audio headers include the following:

Front panel audio (a 2 x 5-pin header that provides headphone and mic in signals for front panel audio connectors) (yellow)
S/PDIF audio header (1 x 4-pin header) (yellow)
Internal mono speaker header (1 x 2-pin header) (yellow)

For information about Refer to

The locations of the front panel audio header, S/PDIF header, and internal mono speaker header	Figure 10, page 45
The signal names of the front panel audio header	Table 13 and Table 14, page 47
The signal names of the S/PDIF header	Table 11, page 47
The signal names of the internal mono speaker header	Table 12, page 47
The back panel audio connectors	Section 2.2.1, page 44

1.11.2.1 Analog Audio Connectors

The available configurable back panel audio connectors are shown in Figure 4.

C Mic in

Figure 4. Back Panel Audio Connector Options

The back panel audio connectors are configurable through the audio device drivers.

Refer to

The front panel headphone output is supported using a separate audio channel pair allowing multi-streaming audio configurations such as simultaneous 5.1 surround playback and stereo audio conferencing (through back panel speakers and a front panel headset, respectively).

1.11.2.2 S/PDIF Header

The S/PDIF header allows connections to coaxial or optical dongles for digital audio output.

1.11.2.3 Internal Mono Speaker Header

The internal mono speaker header allows connection to an internal, low-power speaker for basic system sound capability. The subsystem is capable of driving a speaker load of 8 Ohms at 1 W (rms) or 4 Ohms at 1.5 W (rms).

1.12LAN Subsystem

The LAN subsystem consists of the following:

Intel 82579LM Gigabit Ethernet Controller (10/100/1000 Mbits/s)
RJ-45 LAN connector with integrated status LEDs

Refer to

1.12.1 Intel^® 82579LM Gigabit Ethernet Controller

The Intel 82579LM Gigabit Ethernet Controller supports the following features:

10/100/1000 BASE-T IEEE 802.3 compliant
PCI Express link
Compliant to IEEE 802.3x flow control support
802.1p and 802.1q
TCP, IP, and UDP checksum offload (for IPv4 and IPv6)
Transmit TCP segmentation
Full device driver compatibility
PCI Express power management support
Intel AMT 7.0

1.12.2 LAN Subsystem Software

LAN software and drivers are available from Intel’s World Wide Web site.

For information about Refer to

Obtaining LAN software and drivers

1.12.3 RJ-45 LAN Connector with Integrated LEDs

Two LEDs are built into the RJ-45 LAN connector (shown in Figure 5).

Figure 5. LAN Connector LED Locations

Table 4 describes the LED states when the board is powered up and the LAN subsystem is operating.

Table 4. LAN Connector LED States

LED	LED Color	LED State	Condition
Link/Activity	Green	Off	LAN link is not established.
		On	LAN link is established.
		Blinking	LAN activity is occurring.
Link Speed	Green/Yellow	Off	10 Mbits/s data rate is selected or negotiated.
		Green	100 Mbits/s data rate is selected or negotiated.
		Yellow	1000 Mbits/s data rate is selected or negotiated.

1.13Real-Time Clock Subsystem

A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer is not plugged into a wall socket, the battery has an estimated life of three years. When the computer is plugged in, the standby current from the power supply extends the life of the battery.

The clock is accurate to ± 13 minutes/year at 25 ºC with power applied through the power supply 5V STBY rail.

NOTE

If the battery and AC power fail date and time values will be reset and the user will be notified during POST.

When the voltage drops below a certain level, the BIOS Setup program settings stored in CMOS RAM (for example, the date and time) might not be accurate. Replace the battery with an equivalent one. Figure 1 on page 11 shows the location of the battery.

1.14Thermal Monitoring

Figure 6 shows the locations of the thermal sensors and fan headers.

C Front chassis fan header

D Rear chassis fan header

Figure 6. Thermal Sensors and Fan Headers

1.15Platform Management and Security

In addition to Intel AMT the Intel DQ67OW Desktop Board integrates several functions designed to manage the system and lower the total cost of ownership (TCO) of the system. These system management functions are designed to report errors, diagnose the system, and recover from system lockups without the aid of an external microcontroller.

1.15.1 Hardware Management Subsystem

The hardware management features enable the board to be compatible with the Wired for Management (WfM) specification. The board has several hardware management features, including the following:

Fan monitoring and control
Thermal and voltage monitoring
Chassis intrusion detection

1.15.2 Hardware Monitoring

The hardware monitoring and fan control subsystem is based on the Nuvoton W83677HG-i device, which supports the following:

Processor and system ambient temperature monitoring
Chassis fan speed monitoring
Power monitoring of +12 V, +5 V, +3.3 V, V_SM, and +VCCP
SMBus interface

1.15.2.1 Fan Monitoring

Fan monitoring can be observed through the BIOS setup user interface, Intel^® Desktop Utilities or third-party software.

For information about Refer to

The functions of the fan headers

1.15.2.2 Chassis Intrusion and Detection

The board supports a chassis security feature that detects if the chassis cover is removed. The security feature uses a mechanical switch on the chassis that attaches to the chassis intrusion header. When the chassis cover is removed, the mechanical switch is in the closed position.

For information about Refer to

The location of the chassis intrusion header Figure 10, page 45

1.15.3 Intel^® vPro™ Technology

Intel^® vPro™ Technology is a set of processor and platform capabilities designed to enable greater proactive security, enhanced maintenance, and improved remote management both inside and outside the corporate firewall. These include:

Intel Active Management Technology (Intel AMT)
Intel Virtualization Technology (Intel VT)
Intel Trusted Execution Technology (Intel TXT)
Intel Virtualization Technology for Directed I/O (Intel VT-d)
Intel Fast Call for Help (Intel FCFH)
Trusted Platform Module (TPM)
KVM Remote Control

1.15.3.1 Intel^® Active Management Technology

(Intel^® AMT)

Intel Active Management Technology (Intel AMT) offers IT organizations tamperresistant and persistent management capabilities. Specifically, IntelAMT is a hardware-based solution that uses out of band communication to manage access to client systems in addition to offering encrypted and persistent asset management and remote diagnostics and/or recovery capabilities for networked platforms. With Intel AMT, IT organizations can easily get accurate platform information, and can perform remote updating, diagnostics, debugging and repair of a system, regardless of the state of the operating system or the power state of the system.

The Intel Active Management Technology subsystem consists of:

Intel ME microcontroller embedded in the Intel Q67 PCH
Intel 82578LM Gigabit (10/100/1000 Mbits/s) Ethernet LAN controller
BIOS/SPI Flash (64 Mbits)

NOTE

Software with AMT capability is required to take advantage of Intel AMT platform management capabilities.

1.15.3.1.1 Intel AMT Features

The key features of Intel AMT include:

Secure Out of Band (OOB) system management that allows remote management of PCs regardless of system power or operating system state.

⎯SSL 3.1/TLS encryption

⎯HTTP authentication

⎯TCP/IP

⎯HTTP web GUI

⎯XML/SOAP API

⎯Web Services for Management (WS-MAN) protocol support

Remote troubleshooting and recovery that can significantly reduce desk-side visits and potentially increasing efficiency of IT technical staff.

⎯System event log

⎯IDE Redirection (IDE-R) or PXE boot: remote CD or network drive boot

⎯Serial over LAN

⎯OOB diagnostics

⎯Remote control

⎯Operating system repair

Proactive alerting that decreases downtime and minimizes time to repair.

⎯Programmable policies

⎯Operating system lock-up alert

⎯Boot failure alert

⎯Hardware failure alerts

Third party non-volatile storage that prevents users from removing critical inventory, remote control, or virus protection agents.

⎯Nonvolatile storage for agents

⎯Tamper-resistant

Remote hardware and software asset tracking that eliminates time-consuming manual inventory tracking, which also reduces asset accounting costs.

⎯E-Asset Tag

⎯HW/SW inventory

System Defense 2. In addition to the in-bound and out-bound packet filtering of the previous generation, System Defense 2 is an Intel AMT feature that uses advanced heuristics to help protect against the propagation of worms through the use of preset packet filters. The number of new connections made to a specific port or IP address are counted over a specific time window. If a preset threshold is exceeded, it will alert the Management Console and suspend the client’s network activity until the system can be remediated.
Remote Configuration (RCFG) minimizes the cost to deploy Intel AMT by eliminating the need for IT personnel to touch each client system prior to configuration. Remote Configuration consists of a single OEM BIOS/Firmware image that provides the Intel AMT client with information to authenticate connections and allows it to remotely perform a secure setup procedure. IT departments must acquire an appropriate Intel AMT-trusted certificate as well as use a remote management application that supports Remote Configuration.

Remote Configuration also requires the use of automatic IP addressing (DHCP).

KVM (Keyboard-Video-Mouse) Remote Control allows an IT administrator to remotely control a user’s keyboard without having to rely on third-party software applications. The user retains the ability to allow or discontinue the remote access through on-screen pop-up windows. The maximum resolution supported by KVM Remote Control is 1920 x 1200.

NOTE

KVM Remote Control requires the use of an Intel^® processor with integrated graphics. If using simultaneous integrated graphics and add-in PCI Express Graphics, Integrated Graphics Device (IGD) must be set as the Primary Video Device in the BIOS Setup in order for POST information to be seen during a KVM Remote Control session. Likewise, IGD must be set as Primary Video Device in the operating system for mouse functionality during a KVM Remote Control session.

• PC Alarm Clock can wake the PC at scheduled times to run resource-intensive tasks during off hours, improving security and performance of the platform.

1.15.3.1.2 Intel AMT Software and Drivers

Intel AMT software and drivers are available from Intel’s World Wide Web site. The package usually consists of the following components:

Intel^® Management Engine Interface (Intel^® ME Interface)
Serial Over LAN (SOL) driver
Local Manageability Service (LMS)
User Notification Service (UNS)
Intel^® ME WMI provider
Intel^® Active Management Technology NAC Posture Plug-in
Intel^® Control Center
Intel^® Management and Security Status Application

For information about Refer to

1.15.3.2 Intel^® Virtualization Technology (Intel^®VT)

Intel Virtualization Technology (Intel VT) is a processor technology that enables a platform to run multiple operating systems and applications as independent machines, allowing one computer system to function as multiple "virtual" systems. It also provides the “assisted hardware virtualization” required by some operating systems for backward compatibility, such as Windows XP Mode for Windows 7.

NOTE

Requires an Intel processor that supports Intel VT.

1.15.3.3 Intel^® Trusted Execution Technology (Intel^®TXT)

Intel Trusted Execution Technology (IntelTXT) helps protect the platform against software-based attacks and preserves the confidentiality and integrity of the data created and stored on the system. It accomplishes this by using a measured launch and leveraging Intel VT to produce a protected environment for the execution of sensitive applications.

NOTE

Requires an Intel processor that supports Intel TXT.

1.15.3.4 Intel^® Virtualization Technology for Directed I/O

(Intel^®VT-d)

Intel Virtualization Technology for Directed I/O (Intel VT-d) compliments Intel VT by providing the ability to isolate and restrict device accesses to the resources owned by the virtual partition managing the device.

NOTE

Requires an Intel processor that supports Intel VT.

1.15.3.5 Intel^® Fast Call for Help (Intel^® FCFH)

Intel Fast Call for Help supplies remote maintenance connectivity for the Enterprise user inside or outside the corporate firewall. Coupled with your enterprise’s Management Presence Server, it provides both reactive and proactive maintenance. Inside the firewall, this feature adapts Client Initiated Local Access (CILA); outside the firewall it uses Client Initiated Remote Access (CIRA).

Many of the features of Intel AMT are available with Intel Fast Call for Help. These include Serial-over-LAN, IDE Redirection, KVM Remote Control, and PC Alarm Clock.

For information about Refer to

The location of the Intel FCFH header	Figure 10, page 45
1.15.3.6 Trusted Platform Module (TPM)

The Nuvoton WPCT210 TPM version 1.2 revision 103 component is specifically designed to enhance platform security above-and-beyond the capabilities of today’s software by providing a protected space for key operations and other security critical tasks. Using both hardware and software, the TPM protects encryption and signature keys at their most vulnerable stages—operations when the keys are being used unencrypted in plain-text form. The TPM shields unencrypted keys and platform authentication information from software-based attacks.

Refer to

1.16Power Management

Power management is implemented at several levels, including:

Software support through Advanced Configuration and Power Interface (ACPI)
Hardware support:

⎯Power connector

⎯Fan headers

⎯LAN wake capabilities

⎯Instantly Available PC technology

⎯Wake from USB

⎯Power Management Event signal (PME#) wake-up support

⎯PCI Express WAKE# signal support

⎯Wake from serial port

⎯Wake from PS/2

1.16.1 ACPI

ACPI gives the operating system direct control over the power management and Plug and Play functions of a computer. The use of ACPI with this board requires an operating system that provides full ACPI support. ACPI features include:

Plug and Play (including bus and device enumeration)
Power management control of individual devices, add-in boards (some add-in boards may require an ACPI-aware driver), video displays, and hard disk drives
Methods for achieving less than 15-watt system operation in the power-on/standby sleeping state
A Soft-off feature that enables the operating system to power-off the computer
Support for multiple wake-up events (see Table 7 on page 36)
Support for a front panel power and sleep mode switch

Table 5 lists the system states based on how long the power switch is pressed, depending on how ACPI is configured with an ACPI-aware operating system.

Table 5. Effects of Pressing the Power Switch

If the system is in this state…	…and the power switch is pressed for	…the system enters this state
Off (ACPI G2/G5 – Soft off)	Less than four seconds	Power-on (ACPI G0 – working state)
On (ACPI G0 – working state)	Less than four seconds	Soft-off/Standby (note) (ACPI G1 – sleeping state)
On (ACPI G0 – working state)	More than six seconds	Fail safe power-off (ACPI G2/G5 – Soft off)
Sleep (ACPI G1 – sleeping state)	Less than four seconds	Wake-up (ACPI G0 – working state)
Sleep (ACPI G1 – sleeping state)	More than six seconds	Power-off (ACPI G2/G5 – Soft off)

Note: System can only enter Standby state if power switch action is properly configured by the operating system.

1.16.1.1 System States and Power States

Under ACPI, the operating system directs all system and device power state transitions. The operating system puts devices in and out of low-power states based on user preferences and knowledge of how devices are being used by applications. Devices that are not being used can be turned off. The operating system uses information from applications and user settings to put the system as a whole into a low-power state.

Table 6 lists the power states supported by the board along with the associated system power targets. See the ACPI specification for a complete description of the various system and power states.

Table 6. Power States and Targeted System Power

Global States	Sleeping States	Processor States	Device States	Targeted System Power (Note 1)
G0 – working state	S0 – working	C0 – working	D0 – working state.	Full power > 30 W
G1 – sleeping state	S1 – Processor stopped (Note 3)	C1 – stop grant	D1, D2, D3 – device specification specific.	5 W < power < 52.5 W
G1 – sleeping state	S3 – Suspend to RAM. Context saved to RAM.	No power	D3 – no power except for wake-up logic.	Power < 5 W (Note 2)
G1 – sleeping state	S4 – Suspend to disk. Context saved to disk.	No power	D3 – no power except for wake-up logic.	Power < 5 W (Note 2)
G2/S5	S5 – Soft off. Context not saved. Cold boot is required.	No power	D3 – no power except for wake-up logic.	Power < 5 W (Note 2)
G3 – mechanical off AC power is disconnected from the computer.	No power to the system.	No power	D3 – no power for wake-up logic, except when provided by battery or external source.	No power to the system. Service can be performed safely.

Notes:

Total system power is dependent on the system configuration, including add-in boards and peripherals powered by the system chassis’ power supply.
Dependent on the standby power consumption of wake-up devices used in the system.
S1 is not supported by the BIOS, it is included for reference only.

NOTE

In order to support processor Deep Sx states, ME Power Package 1 (ME On in S0) must be selected in the BIOS setup. However, this will disable Intel AMT Out-of-Band (OOB) support, including the ability to wake the system using Intel AMT.

1.16.1.2 Wake-up Devices and Events

Table 7 lists the devices or specific events that can wake the computer from specific states.

Table 7. Wake-up Devices and Events

These devices/events can wake up the computer…	…from this state
Power switch	S3, S4, S5
RTC alarm	S3, S4, S5
LAN	S3, S4, S5
USB	S3
PME# signal	S3, S4, S5
WAKE# signal	S3, S4, S5
Serial port	S3
PS/2	S3, S4, S5

Notes:

S4 implies operating system support only.
USB ports are turned off during S4/S5 states.

NOTE

The use of these wake-up events from an ACPI state requires an operating system that provides full ACPI support. In addition, software, drivers, and peripherals must fully support ACPI wake events.

1.16.2 Hardware Support

CAUTION

Ensure that the power supply provides adequate +5 V standby current if LAN wake capabilities and Instantly Available PC technology features are used. Failure to do so can damage the power supply. The total amount of standby current required depends on the wake devices supported and manufacturing options.

The board provides several power management hardware features, including:

Power connector
Fan headers
LAN wake capabilities
Instantly Available PC technology
Wake from USB
PME# signal wake-up support
WAKE# signal wake-up support
Wake from serial port
Wake from PS/2
+5 V Standby Power Indicator LED

LAN wake capabilities and Instantly Available PC technology require power from the +5 V standby line.

NOTE

The use of Wake from USB from an ACPI state requires an operating system that provides full ACPI support.

1.16.2.1 Power Connector

ATX12V-compliant power supplies can turn off the system power through system control. When an ACPI-enabled system receives the correct command, the power supply removes all non-standby voltages.

When resuming from an AC power failure, the computer returns to the power state it was in before power was interrupted (on or off). The computer’s response can be set using the Last Power State feature in the BIOS Setup program’s Boot menu.

For information about Refer to

The location of the main power connector	Figure 10, page 45
The signal names of the main power connector	Table 23, page 52

1.16.2.2 Fan Headers

The function/operation of the fan headers is as follows:

The fans are on when the board is in the S0 state
The fans are off when the board is in the S3, S4, or S5 state
Each fan header is wired to a fan tachometer input of the hardware monitoring and fan control ASIC
All fan headers support closed-loop fan control that can adjust the fan speed or switch the fan on or off as needed
All fan headers have a +12 V DC connection
4-pin fan headers are controlled by Pulse Width Modulation
The front fan and rear fan headers also support linear fan control on 3-wire fans

For information about Refer to

The location of the fan headers	Figure 10, page 45
The location of the fan headers and sensors for thermal monitoring	Figure 6, page 27

1.16.2.3 LAN Wake Capabilities

CAUTION

For LAN wake capabilities, the +5 V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to provide adequate standby current when implementing LAN wake capabilities can damage the power supply.

LAN wake capabilities enable remote wake-up of the computer through a network. The LAN subsystem monitors network traffic at the Media Independent Interface. Upon detecting a Magic Packet* frame, the LAN subsystem asserts a wake-up signal that powers up the computer.

1.16.2.4 Instantly Available PC Technology

CAUTION

For Instantly Available PC technology, the +5 V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to provide adequate standby current when implementing Instantly Available PC technology can damage the power supply.

Instantly Available PC technology enables the board to enter the ACPI S3 (Suspend-toRAM) sleep-state. While in the S3 sleep-state, the computer will appear to be off (the power supply is off and the front panel power LED will behave as configured by the BIOS “S3 State Indicator” option). When signaled by a wake-up device or event, the system quickly returns to its last known wake state. Table 7 on page 36 lists the devices and events that can wake the computer from the S3 state.

The board supports the PCI Bus Power Management Interface Specification. Add-in boards that also support this specification can participate in power management and can be used to wake the computer.

The use of Instantly Available PC technology requires operating system support and PCI 2.2 compliant add-in cards, PCI Express add-in cards, and drivers.

1.16.2.5 Wake from USB

USB bus activity wakes the computer from an ACPI S3 state.

NOTE

Wake from USB requires the use of a USB peripheral that supports Wake from USB and is supported by the operating system.

1.16.2.6 PME# Signal Wake-up Support

When the PME# signal on the Conventional PCI bus is asserted, the computer wakes from an ACPI S3, S4, or S5 state.

1.16.2.7 WAKE# Signal Wake-up Support

When the WAKE# signal on a PCI Express add-in card is asserted, the computer wakes from an ACPI S3, S4, or S5 state.

1.16.2.8 Wake from Serial Port

Serial port activity wakes the computer from an ACPI S3 state.

1.16.2.9 Wake from PS/2 Devices

PS/2 device activity wakes the computer from an ACPI S3, S4, or S5 state. However, when the computer is in an S4 or S5 state, the only PS/2 activity that will wake the computer is the alt-PrtScrn key combination on the keyboard.

1.16.2.10+5 V Standby Power LED

The green +5 V standby power indicator LED shows that power is still present even when the computer appears to be off. Figure 7 shows the location of the Standby Power indicator LED on the board.

CAUTION

If AC power has been switched off and the standby power indicators are still lit, disconnect the power cord before installing or removing any devices connected to the board. Failure to do so could damage the board and any attached devices.

Figure 7. Location of the Standby Power LED (Green)

2 Technical Reference

2.1 Memory Resources

2.1.1 Addressable Memory

The board utilizes 32 GB of addressable system memory. Typically the address space that is allocated for Conventional PCI bus add-in cards, PCI Express configuration space, BIOS (SPI Flash device), and chipset overhead resides above the top of DRAM (total system memory). On a system that has 32 GB of system memory installed, it is not possible to use all of the installed memory due to system address space being allocated for other system critical functions. These functions include the following:

BIOS/SPI Flash device (64 Mbit)
Local APIC (19 MB)
Direct Media Interface (40 MB)
Front side bus interrupts (17 MB)
PCI Express configuration space (256 MB)
PCH base address registers PCI Express ports (up to 256 MB)
Memory-mapped I/O that is dynamically allocated for Conventional PCI and PCI Express add-in cards (256 MB)

The board provides the capability to reclaim the physical memory overlapped by the memory mapped I/O logical address space. The board remaps physical memory from the top of usable DRAM boundary to the 4 GB boundary to an equivalent sized logical address range located just above the 4 GB boundary. Figure 8 shows a schematic of the system memory map. All installed system memory can be used when there is no overlap of system addresses.

NOTE

32-bit operating systems may not be able to make use of physical memory higher than 4 GB. Check with your operating system vendor.

NOTE

32-bit operating systems may see less available memory than what is shown in Section 2.1.1 due to CPU MTRR cache allocation.

Figure 8. Detailed System Memory Address Map

2.1.2 Memory Map

Table 8 lists the system memory map.

Table 8. System Memory Map

Address Range	Address Range	Size	Description
1024 K - 33550336 K	100000 – 7FFC00000	32764 MB	Extended memory
960 K - 1024 K	F0000 - FFFFF	64 KB	Runtime BIOS
896 K - 960 K	E0000 - EFFFF	64 KB	Reserved
800 K - 896 K	C8000 - DFFFF	96 KB	Potential available high DOS
640 K - 800 K	A0000 - C7FFF	160 KB	( h Video memory and BIOS
639 K - 640 K	9FC00 - 9FFFF	1 KB	Extended BIOS data (movable by
512 K - 639 K	80000 - 9FBFF	127 KB	f ) Extended conventional memory
0 K - 512 K	00000 - 7FFFF	512 KB	Conventional memory

2.2 Connectors and Headers

CAUTION

Only the following connectors and headers have overcurrent protection: back panel and front panel USB, and PS/2.

The other internal connectors and headers are not overcurrent protected and should connect only to devices inside the computer’s chassis, such as fans and internal peripherals. Do not use these connectors or headers to power devices external to the computer’s chassis. A fault in the load presented by the external devices could cause damage to the computer, the power cable, and the external devices themselves.

Furthermore, improper connection of USB header single wire connectors may eventually overload the overcurrent protection and cause damage to the board.

This section describes the board’s connectors. The connectors can be divided into these groups:

Back panel I/O connectors
Component-side I/O connectors and headers (see page 45)

2.2.1 Back Panel Connectors

Figure 9 shows the location of the back panel connectors for the board.

C LAN

D USB 2.0 ports

E VGA connector

F Parallel port

G DVI-D connector

H USB 2.0 ports

I Audio line in

J Audio line out

K Mic in

Figure 9. Back Panel Connectors

NOTE

The back panel audio line out connector is designed to power headphones or amplified speakers only. Poor audio quality occurs if passive (non-amplified) speakers are connected to this output.

2.2.2 Component-side Connectors and Headers

Figure 10 shows the locations of the component-side connectors and headers.

Figure 10. Component-side Connectors and Headers

Table 9 lists the component-side connectors and headers identified in Figure 10.

Table 9. Component-side Connectors and Headers Shown in Figure 10

Item/callout from Figure 10	Description
A	Conventional PCI bus add-in card connector
B	Front panel audio header
C	PCI Express x4 bus add-in card connector
D	Internal mono speaker header
E	PCI Express x1 bus add-in card connector
F	PCI Express x16 bus add-in card connector
G	12 V internal power connector (ATX12V)
H	Processor fan header
I	Serial port header
J	Chassis intrusion header
K	Front chassis fan header
L	Diskette drive connector
M	Main power connector (2 x 12)
N	Alternate front panel power LED header
O	Front panel header
P	SATA connectors
Q	Intel MEBX Reset header
R	Front panel USB header
S	Intel FCFH header
T	Front panel USB header
U	Front panel USB header
V	Front panel USB header
W	S/PDIF header
X	Rear chassis fan header

2.2.2.1 Signal Tables for the Connectors and Headers

Table 10. Serial Port Header

Pin	Signal Name	Pin	Signal Name
1	DCD (Data Carrier Detect)	2	RXD# (Receive Data)
3	TXD# (Transmit Data)	4	DTR (Data Terminal Ready)
5	Ground	6	DSR (Data Set Ready)
7	RTS (Request To Send)	8	CTS (Clear To Send)
9	RI (Ring Indicator)	10	Key (no pin)

Table 11. S/PDIF Header

Pin	Signal Name
1	Ground
2	S/PDIF out
3	Key (no pin)
3	+5V_DC

Table 12. Internal Mono Speaker Header

Pin	Signal Name
1	−
2	+

Table 13. Front Panel Audio Header for Intel HD Audio

Pin	Signal Name	Pin	Signal Name
1	[Port 1] Left channel	2	Ground
3	[Port 1] Right channel	4	PRESENCE# (Dongle present)
5	[Port 2] Right channel	6	[Port 1] SENSE_RETURN
7	SENSE_SEND (Jack detection)	8	Key (no pin)
9	[Port 2] Left channel	10	[Port 2] SENSE_RETURN

Table 14. Front Panel Audio Header for AC ’97 Audio

Pin	Signal Name	Pin	Signal Name
1	MIC	2	AUD_GND
3	MIC_BIAS	4	AUD_GND
5	FP_OUT_R	6	FP_RETURN_R
7	AUD_5V	8	KEY (no pin)
9	FP_OUT_L	10	FP_RETURN_L

NOTE

Not all AC ’97 signals are supported; specifically, pins 4, 6, 7, and 10 are not supported.

Table 15. Front Panel USB Header

Pin	Signal Name	Pin	Signal Name
1	+5 VDC	2	+5 VDC
3	D-	4	D-
5	D+	6	D+
7	Ground	8	Ground
9	KEY (no pin)	10	No Connect

Table 16. SATA Connectors

Pin	Signal Name
1	Ground
2	TXP
3	TXN
4	Ground
5	RXN
6	RXP
7	Ground

Table 17. Chassis Intrusion Header

Pin	Signal Name
1	Intruder#
2	Ground

Table 18. Processor (4-Pin) Fan Header

Pin	Signal Name
1	Ground
2	+12 V
3	FAN_TACH
4	FAN_CONTROL

Table 19. Front and Rear Chassis Fan Headers

Pin	4-Wire Support	Pin	3-Wire Support
1	Ground	3	Ground
2	+12 V	2	FAN_POWER
3	FAN_TACH	1	FAN_TACH
4	FAN_CONTROL	N/A	N/A

Table 20. Intel FCFH Header

Pin	Description
1	Ground
2	FCFH#

Table 21. Diskette Drive Connector

Pin	Signal Name
1	Ground
2	Density Select
3	Ground
4	Reserved
5	Ground
6	Reserved
7	Ground
8	Index
9	Ground
10	Motor Enable Drive A
11	Ground
12	Drive Select B
13	Ground
14	Drive Select A
15	Ground
16	Motor Enable Drive B
17	Ground
18	Direction Select
19	Ground
20	Head Step
21	Ground
22	Write Data
23	Ground
24	Floppy Write Enable
25	Ground
26	Track 00
27	Ground
28	Write Protect
29	Ground
30	Read Data
31	Ground
32	Head Select
33	Ground
34	Disk Change

2.2.2.2 Add-in Card Connectors

The board has the following add-in card connectors:

PCI Express 2.0 x16: one PCI Express 2.0 x16 connector. This connector supports simultaneous transfer speeds of up to 8 GB/s of peak bandwidth per direction.
PCI Express 2.0 x4: one PCI Express 2.0 x4 connector. The x4 interface supports simultaneous transfer speeds up to 500 MB/s of peak bandwidth per direction and up to 4 GB/s concurrent bandwidth.
PCI Express 2.0 x1: one PCI Express 2.0 x1 connector. The x1 interface supports simultaneous transfer speeds up to 1 GB/s of peak bandwidth per direction and up to 2 GB/s concurrent bandwidth.
One Conventional PCI (rev 2.3 compliant) connector.

Note the following considerations for the Conventional PCI bus connector:

The Conventional PCI bus connector is bus master capable.
SMBus signals are routed to the Conventional PCI bus connector. This enables Conventional PCI bus add-in boards with SMBus support to access sensor data on the desktop board. The specific SMBus signals are as follows:

⎯The SMBus clock line is connected to pin A40.

⎯The SMBus data line is connected to pin A41.

2.2.2.3 Power Supply Connectors

The board has the following power supply connectors:

Main power – a 2 x 12 connector. This connector is compatible with 2 x 10 connectors previously used on Intel Desktop boards. The board supports the use of ATX12V power supplies with either 2 x 10 or 2 x 12 main power cables. When using a power supply with a 2 x 10 main power cable, pins 11, 12, 23, and 24 must remain unconnected.
Processor core power – a 2 x 2 connector. This connector provides power directly to the processor voltage regulator and must always be used. Failure to do so will prevent the board from booting.

CAUTION

If a high power (75 W or greater) add-in card is installed in the PCI Express x16 connector, that card must also be connected directly to the power supply. Failure to do so may cause damage to the board and the add-in card.

Table 22. Processor Core Power Connector

Pin	Signal Name	Pin	Signal Name
1	Ground	2	Ground
3	+12 V	4	+12 V

Table 23. Main Power Connector

Pin	Signal Name	Pin	Signal Name
1	+3.3 V	13	+3.3 V
2	+3.3 V	14	−12 V
3	Ground	15	Ground
4	+5 V	16	PS-ON# (power supply remote on/off)
5	Ground	17	Ground
6	+5 V	18	Ground
7	Ground	19	Ground
8	PWRGD (Power Good)	20	−5 V (obsolete)
9	+5 V (Standby)	21	+5 V
10	+12 V	22	+5 V
11	+12 V (Note)	23	+5 V (Note)
12	+3.3 V 2 x 12 connector detect (Note)	24	Ground (Note)

Note: When using a 2 x 10 power supply cable, this pin will be unconnected.

Refer to

2.2.2.4 Front Panel Header

This section describes the functions of the front panel header. Table 24 lists the signal names of the front panel header. Figure 11 is a connection diagram for the front panel header.

Table 24. Front Panel Header

Pin	Signal	In/ Out	Description	Pin	Signal	In/ Out	Description
Hard Drive Activity LED				Power LED
1	HD_PWR	Out	Hard disk LED pull-up to +5 V	2	FP_LED+	Out	Front panel green LED
3	HDA#	Out	Hard disk active LED	4	FP_LED−	Out	Front panel yellow LED
Reset Switch				On/Off Switch
5	Ground		Ground	6	PWR#	In	Power switch
7	FP_RESET#	In	Reset switch	8	Ground		Ground
Power				Not Connected
9	+5 V		Power	10	N/C		Not connected

Figure 11. Connection Diagram for Front Panel Header

2.2.2.4.1 Hard Drive Activity LED Header

Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is being read from or written to an internal storage device. Proper LED function requires a SATA hard drive or optical drive connected to an onboard SATA connector.

2.2.2.4.2 Reset Switch Header

Pins 5 and 7 can be connected to a momentary single pole, single throw (SPST) type switch that is normally open. When the switch is closed, the board resets and runs the POST.

2.2.2.4.3 Power LED Header

Pins 2 and 4 can be connected to a one- or two-color LED. Table 25 shows the default states for this LED. More options are available through BIOS setup.

Table 25. States for a One-Color Power LED

LED State	Description
Off	Power off/sleeping
Steady Lit	Running
Blink	Standby

2.2.2.4.4 Power Switch Header

Pins 6 and 8 can be connected to a front panel momentary-contact power switch. The switch must pull the SW_ON# pin to ground for at least 50 ms to signal the power supply to switch on or off. (The time requirement is due to internal debounce circuitry on the board.) At least two seconds must pass before the power supply will recognize another on/off signal.

2.2.2.5 Alternate Front Panel Power LED Header

Pins 1 and 3 of this header duplicate the signals on pins 2 and 4 of the front panel header.

Table 26. Alternate Front Panel Power LED Header

Pin	Signal Name	In/Out	Description
1	FP_LED+	Out	FP_LED+
2	Not connected
3	FP_LED−	Out	FP_LED−

2.2.2.6 Front Panel USB Headers

Figure 12 is a connection diagram for the front panel USB headers.

NOTE

The +5 V DC power on the USB headers is fused.
Use only a front panel USB connector that conforms to the USB 2.0 specification for high-speed USB devices.

Figure 12. Connection Diagram for Front Panel USB Headers

2.3 BIOS Configuration Jumper Block

CAUTION

Do not move the jumper with the power on. Always turn off the power and unplug the power cord from the computer before changing a jumper setting. Otherwise, the board could be damaged.

Figure 13 shows the location of the jumper block. The 3-pin jumper block determines the BIOS Setup program’s mode. Table 27 describes the jumper settings for the three modes: normal, configure, and recovery.

Figure 13. Location of the Jumper Block

Table 27. BIOS Setup Configuration Jumper Settings

Function/Mode	Jumper Setting	Configuration
Normal	1-2	The BIOS uses current configuration information and passwords for booting.
Configure	2-3	After the POST runs, Setup runs automatically. The maintenance menu is displayed. Note that this Configure mode is the only way to clear the BIOS/CMOS settings. Press F9 (restore defaults) while in Configure mode to restore the BIOS/CMOS settings to their default values.
Recovery	None	The BIOS attempts to recover the BIOS configuration. A recovery CD or USB flash drive is required.

2.4 Intel^® Management Engine BIOS Extension (Intel^® MEBX) Reset Header

The Intel^® MEBX reset header (see Figure 14) allows you to reset the Intel AMT configuration to the factory defaults. Momentarily shorting pins 1 and 2 with a jumper (not supplied) will accomplish the following:

Return all Intel ME parameters to their default values.
Delete any user entered information, including PID/PPS and user entered Hash Certificates. USB key and remote configuration data will be removed if the parameters are not default parameters.
Reset the Intel MEBX password to the default value (admin).

Figure 14. Intel MEBX Reset Header

Table 28. Intel MEBX Reset Header Signals

Pin	Function
1	PCH.AK24 (PCH_RTCRST_PULLUP)
2	Ground
3	No connection

CAUTION

Always turn off the power and unplug the power cord from the computer before installing an MEBX jumper. The jumper must be removed before reapplying power.

The system must be allowed to reach end of POST before reset is complete. Otherwise, the board could be damaged.

2.5 Mechanical Considerations

2.5.1 Form Factor

The board is designed to fit into a microATX form-factor chassis. Figure 15 illustrates the mechanical form factor for the board. Dimensions are given in inches

[millimeters]. The outer dimensions are 9.60 inches by 9.60 inches

[243.84 millimeters by 243.84 millimeters]. Location of the I/O connectors and mounting holes are in compliance with the ATX specification.

Figure 15. Board Dimensions

2.6 Electrical Considerations

2.6.1 Power Supply Considerations

CAUTION

The +5 V standby line from the power supply must be capable of providing adequate +5 V standby current. Failure to do so can damage the power supply. The total amount of standby current required depends on the wake devices supported and manufacturing options.

Additional power required will depend on configurations chosen by the integrator.

The power supply must comply with the indicated parameters of the ATX form factor specification.

The potential relation between 3.3 VDC and +5 VDC power rails
The current capability of the +5 VSB line
All timing parameters
All voltage tolerances

For example, for a system consisting of a supported 95 W processor (see Section 1.4 on page 14 for information on supported processors), 2 GB DDR3 RAM, one high end video card, one hard disk drive, one optical drive, and all board peripherals enabled, the minimum recommended power supply is 460 W. Table 29 lists the recommended power supply current values.

Table 29. Recommended Power Supply Current Values

Output Voltage	3.3 V	5 V	12 V1	12 V2	-12 V	5 VSB
Current	22 A	20 A	16 A	16 A	0.3 A	1.5 A

2.6.2 Fan Header Current Capability

CAUTION

The processor fan must be connected to the processor fan header, not to a chassis fan header. Connecting the processor fan to a chassis fan header may result in onboard component damage that will halt fan operation.

Table 30 lists the current capability of the fan headers.

Table 30. Fan Header Current Capability

Fan Header	Maximum Available Current
Processor fan	2.0 A
Front chassis fan	1.5 A
Rear chassis fan	1.5 A

2.6.3 Add-in Board Considerations

The board is designed to provide 2 A (average) of current for each add-in board from the +5 V rail. The total +5 V current draw for add-in boards for a fully loaded board (all expansion slots filled) must not exceed the system’s power supply +5 V maximum current.

2.7 Thermal Considerations

CAUTION

A chassis with a maximum internal ambient temperature of 38 ^oC at the processor fan inlet is required. Use of a processor heat sink that provides omni-directional airflow to maintain required airflow across the processor voltage regulator area is highly recommended.

All responsibility for determining the adequacy of any thermal or system design remains solely with the reader. Intel makes no warranties or representations that merely following the instructions presented in this document will result in a system with adequate thermal performance.

CAUTION

The ambient temperature must not exceed the board’s maximum operating temperature. Failure to do so could cause components to exceed their maximum case temperature and malfunction. For information about the maximum operating temperature, see the environmental specifications in Section 2.9.

CAUTION

Ensure that proper airflow is maintained in the processor voltage regulator circuit. Failure to do so may result in damage to the voltage regulator circuit.

Figure 16 shows the locations of the localized high temperature zones.

C Intel Q67 Express Chipset

Figure 16. Localized High Temperature Zones

Table 31 provides maximum case temperatures for the components that are sensitive to thermal changes. The operating temperature, current load, or operating frequency could affect case temperatures. Maximum case temperatures are important when considering proper airflow to cool the board.

Table 31. Thermal Considerations for Components

Component	Maximum Case Temperature
Processor	For processor case temperature, see processor datasheets and processor specification updates
Intel Q67 Express Chipset	111 ^oC (under bias)

For information about	Refer to
Processor datasheets and specification updates	Section 1.3, page 14

2.8 Reliability

The Mean Time Between Failures (MTBF) prediction is calculated using component and subassembly random failure rates. The calculation is based on the Telcordia "Reliability Prediction Procedure for Electronic Equipment" SR-332 Issue 1, an update of Bellcore TR-332, Issue 6. The MTBF prediction is used to estimate repair rates and spare parts requirements.

The MTBF data is calculated from predicted data at 55 ºC. The MTBF for the board is 221,007.51 hours.

2.9 Environmental

Table 32 lists the environmental specifications for the board.

Table 32. Environmental Specifications

Parameter	Specification
Temperature
Non-Operating	-40 °C to +60 °C
Operating	0 °C to +40 °C
Shock
Unpackaged	50 g trapezoidal waveform
	Velocity change of 170 inches/second²
Packaged	Half sine 2 millisecond
	Product Weight (pounds)	Free Fall (inches)	Velocity Change (inches/sec²)
		36	167
	21-40	30	152
	41-80	24	136
	81-100	18	118
Vibration
Unpackaged	5 Hz to 20 Hz: 0.01 g² Hz sloping up to 0.02 g² Hz
	20 Hz to 500 Hz: 0.02 g² Hz (flat)
Packaged	5 Hz to 40 Hz: 0.015 g² Hz (flat)
	40 Hz to 500 Hz: 0.015 g² Hz sloping down to 0.00015 g² Hz

3 Overview of BIOS Features

3.1 Introduction

The board uses an Intel BIOS that is stored in a 64 Mbit (8,192 KB) Serial Peripheral Interface Flash Memory (SPI Flash) device which can be updated using a set of utilities. The SPI Flash contains the BIOS Setup program, POST, LAN EEPROM information, Plug and Play support, and other firmware.

The BIOS displays a message during POST identifying the type of BIOS and a revision code. The initial production BIOSs are identified as SWQ6710H.86A.

The BIOS Setup program can be used to view and change the BIOS settings for the computer. The BIOS Setup program is accessed by pressing the key after the Power-On Self-Test (POST) memory test begins and before the operating system boot begins. The menu bar is shown below.

Maintenance

Main

Configuration

Performance

Security

Power

Boot

Intel ME

Exit

NOTE

The maintenance menu is displayed only when the board is in configure mode. Section 2.3 on page 56 shows how to put the board in configure mode.

CAUTION

Resetting the BIOS to defaults may result in the system becoming unbootable or corrupting the HDD if RAID is used. This is due to the fact that Chipset-SATA Mode now defaults to AHCI.

Table 33 lists the BIOS Setup program menu features.

Table 33. BIOS Setup Program Menu Bar

Maintenance

Main

Configuration

Performance

Security

Power

Boot

Intel ME

Exit

Clears passwords and displays processor information

Displays processor and memory

configuration

Configures advanced features available through the chipset

Configures

Memory and Processor overrides

Sets passwords and security features

Configures power management features

Selects boot options

Configure Intel ME and Intel

AMT

settings

Saves or discards changes to Setup program options

Table 34 lists the function keys available for menu screens.

Table 34. BIOS Setup Program Function Keys

BIOS Setup Program Function Key	Description
<←> or <→>	Selects a different menu screen (Moves the cursor left or right)
<↑> or <↓>	Selects an item (Moves the cursor up or down)
	Selects sub-items within a field (i.e., date/time)
	Executes command or selects the submenu
	Load the default configuration values for the current menu
	Save the current values and exits the BIOS Setup program
	Exits the menu

3.2 System Management BIOS (SMBIOS)

SMBIOS is a Desktop Management Interface (DMI) compliant method for managing computers in a managed network.

The main component of SMBIOS is the Management Information Format (MIF) database, which contains information about the computing system and its components. Using SMBIOS, a system administrator can obtain the system types, capabilities, operational status, and installation dates for system components. The MIF database defines the data and provides the method for accessing this information. The BIOS enables applications such as third-party management software to use SMBIOS. The BIOS stores and reports the following SMBIOS information:

BIOS data, such as the BIOS revision level
Fixed-system data, such as peripherals, serial numbers, and asset tags
Resource data, such as memory size, cache size, and processor speed
Dynamic data, such as event detection and error logging

Non-Plug and Play operating systems require an additional interface for obtaining the SMBIOS information. The BIOS supports an SMBIOS table interface for such operating systems. Using this support, an SMBIOS service-level application running on a non-Plug and Play operating system can obtain the SMBIOS information. Additional board information can be found in the BIOS under the Additional Information header under the Main BIOS page.

3.3 Legacy USB Support

Legacy USB support enables USB devices to be used even when the operating system’s USB drivers are not yet available. Legacy USB support is used to access the BIOS Setup program, and to install an operating system that supports USB. By default, Legacy USB support is set to Enabled.

Legacy USB support operates as follows:

When you apply power to the computer, legacy support is disabled.
POST begins.
Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and configure the BIOS Setup program and the maintenance menu.
POST completes.
The operating system loads. While the operating system is loading, USB keyboards and mice are recognized and may be used to configure the operating system. (Keyboards and mice are not recognized during this period if Legacy USB support was set to Disabled in the BIOS Setup program.)
After the operating system loads the USB drivers, all legacy and non-legacy USB devices are recognized by the operating system, and Legacy USB support from the BIOS is no longer used.

3.4 BIOS Updates

The BIOS can be updated using either of the following utilities, which are available on the Intel World Wide Web site:

Intel^® Express BIOS Update utility, which enables automated updating while in the Windows environment. Using this utility, the BIOS can be updated from a file on a hard disk, a USB drive (a flash drive or a USB drive), or an optical drive.
Intel^® Flash Memory Update Utility, which requires booting from DOS. Using this utility, the BIOS can be updated from a file on a hard disk, a USB drive (a flash drive or a USB drive), or an optical drive.
Intel^® F7 switch allows a user to select where the BIOS .bio file is located and perform the update from that location/device. Similar to performing a BIOS Recovery without removing the BIOS configuration jumper.

Both utilities verify that the updated BIOS matches the target system to prevent accidentally installing an incompatible BIOS.

NOTE

Review the instructions distributed with the upgrade utility before attempting a BIOS update.

For information about Refer to

BIOS update utilities

3.4.1 Language Support

The BIOS Setup program and help messages are supported in US English.

3.4.2 Custom Splash Screen

During POST, an Intel^® splash screen is displayed by default. This splash screen can be augmented with a custom splash screen. The Intel Integrator’s Toolkit that is available from Intel can be used to create a custom splash screen.

3.5 BIOS Recovery

It is unlikely that anything will interrupt a BIOS update; however, if an interruption occurs, the BIOS could be damaged. Table 35 lists the drives and media types that can and cannot be used for BIOS recovery. The BIOS recovery media does not need to be made bootable however, it must contain the motherboard .bio file at the root level.

Table 35. Acceptable Drives/Media Types for BIOS Recovery

Media Type	Can be used for BIOS recovery?
Optical drive connected to the SATA interface	Yes
USB removable drive (a USB Flash Drive, for example)	Yes
USB diskette drive (with a 1.44 MB diskette)	No
USB hard disk drive	No
Legacy diskette drive (with a 1.44 MB diskette) connected to the legacy diskette drive interface	No

For information about Refer to

BIOS recovery

3.6 Boot Options

In the BIOS Setup program, the user can choose to boot from a hard drive, optical drive, removable drive, or the network. The default setting is for the optical drive to be the first boot device, the hard drive second, removable drive third, and the network fourth.

3.6.1 Optical Drive Boot

Booting from the optical drive is supported in compliance to the El Torito bootable CD-ROM format specification. Under the Boot menu in the BIOS Setup program, the optical drive is listed as a boot device. Boot devices are defined in priority order. Accordingly, if there is not a bootable CD in the optical drive, the system will attempt to boot from the next defined drive.

3.6.2 Network Boot

The network can be selected as a boot device. This selection allows booting from the onboard LAN or a network add-in card with a remote boot ROM installed.

Pressing the key during POST automatically forces booting from the LAN. To use this key during POST, the User Access Level in the BIOS Setup program's Security menu must be set to Full.

3.6.3 Booting Without Attached Devices

For use in embedded applications, the BIOS has been designed so that after passing the POST, the operating system loader is invoked even if the following devices are not present:

Video adapter
Keyboard
Mouse

3.6.4 Changing the Default Boot Device During POST

Pressing the key during POST causes a boot device menu to be displayed. This menu displays the list of available boot devices. Table 36 lists the boot device menu options.

Table 36. Boot Device Menu Options

Boot Device Menu Function Keys	Description
<↑> or <↓>	Selects a default boot device
	Exits the menu, and boots from the selected device
	Exits the menu and boots according to the boot priority defined through BIOS setup

3.7 Hard Disk Drive Password Security Feature

The Hard Disk Drive Password Security feature blocks read and write accesses to the hard disk drive until the correct password is given. Hard Disk Drive Passwords are set in BIOS SETUP and are prompted for during BIOS POST. For convenient support of S3 resume, the system BIOS will automatically unlock drives on resume from S3.

The User hard disk drive password, when installed, will be required upon each powercycle until the Master Key or User hard disk drive password is submitted.

The Master Key hard disk drive password, when installed, will not lock the drive. The

Master Key hard disk drive password exists as an unlock override in the event that the User hard disk drive password is forgotten. Only the installation of the User hard disk drive password will cause a hard disk to be locked upon a system power-cycle.

Table 37 shows the effects of setting the Hard Disk Drive Passwords.

Table 37. Master Key and User Hard Drive Password Functions

Password Set	Password During Boot
Neither	None
Master only	None
User only	User only
Master and User Set	Master or User

During every POST, if a User hard disk drive password is set, POST execution will pause with the following prompt to force the user to enter the Master Key or User hard disk drive password:

Enter Hard Disk Drive Password:

Upon successful entry of the Master Key or User hard disk drive password, the system will continue with normal POST.

If the hard disk drive password is not correctly entered, the system will go back to the above prompt. The user will have three attempts to correctly enter the hard diskdrive password. After the third unsuccessful hard disk drive password attempt, the system will halt with the message:

Hard Disk Drive Password Entry Error

A manual power cycle will be required to resume system operation.

NOTE

As implemented on DQ67OW, Hard Disk Drive Password Security is only supported on SATA port 0. The passwords are stored on the hard disk drive so if the drive is relocated to another SATA port or computer that does not support Hard Disk Drive Password Security feature, the drive will not be accessible.

NOTE

Hard Disk Drive Password Security is not supported in PCH RAID mode.Secured hard disk drives attached to the system when the system is in PCH RAID mode will not be accessible due to the disabling of BIOS Hard Disk Drive Password support.

3.8 BIOS Security Features

The BIOS includes security features that restrict access to the BIOS Setup program and who can boot the computer. A supervisor password and a user password can be set for the BIOS Setup program and for booting the computer, with the following restrictions:

The supervisor password gives unrestricted access to view and change all the Setup options in the BIOS Setup program. This is the supervisor mode.
The user password gives restricted access to view and change Setup options in the BIOS Setup program. This is the user mode.
If only the supervisor password is set, pressing the key at the password prompt of the BIOS Setup program allows the user restricted access to Setup.
If both the supervisor and user passwords are set, users can enter either the supervisor password or the user password to access Setup. Users have access to Setup respective to which password is entered.
Setting the user password restricts who can boot the computer. The password prompt will be displayed before the computer is booted. If only the supervisor password is set, the computer boots without asking for a password. If both passwords are set, the user can enter either password to boot the computer.
For enhanced security, use different passwords for the supervisor and user passwords.
Valid password characters are A-Z, a-z, and 0-9. Passwords may be up to 16 characters in length.

Table 38 shows the effects of setting the supervisor password and user password. This table is for reference only and is not displayed on the screen.

Table 38. Supervisor and User Password Functions

Password Set	Supervisor Mode	User Mode	Setup Options	Password to Enter Setup	Password During Boot
Neither	Can change all options (Note)	Can change all options (Note)	None	None	None
Supervisor only	Can change all options	Can change a limited number of options	Supervisor Password	Supervisor	None
User only	N/A	Can change all options	Enter Password Clear User Password	User	User
Supervisor and user set	Can change all options	Can change a limited number of options	Supervisor Password Enter Password	Supervisor or user	Supervisor or user

Note: If no password is set, any user can change all Setup options.

4 Error Messages and Beep Codes

4.1 Speaker

The board-mounted piezoelectric speaker provides audible error code (beep code) information during POST.

4.2 BIOS Beep Codes

Whenever a recoverable error occurs during POST, the BIOS causes the board’s piezoelectric speaker to beep an error message describing the problem (see Table 39).

Table 39. BIOS Beep Codes

Type	Pattern	Frequency/Comments
F2 Setup/F10 Boot Menu Prompt	One 0.5 second beep when BIOS is ready to accept keyboard input	932 Hz
BIOS update in progress	None
Video error (no add-in graphics card installed)	On-off (1.0 second each) two times, then 2.5-second pause (off), entire pattern repeats (beeps and pause) once and the BIOS will continue to boot.	932 Hz For processors requiring an add-in graphics card
Memory error	On-off (1.0 second each) three times, then 2.5-second pause (off), entire pattern repeats (beeps and pause) until the system is powered off.	932 Hz
Thermal trip warning	Alternate high and low beeps (1.0 second each) for eight beeps, followed by system shut down.	High beep 2000 Hz Low beep 1500 Hz

4.3 Front-panel Power LED Blink Codes

Whenever a recoverable error occurs during POST, the BIOS causes the board’s front panel power LED to blink an error message describing the problem (see Table 40).

Table 40. Front-panel Power LED Blink Codes

Type	Pattern	Note
F2 Setup/F10 Boot Menu Prompt	None
BIOS update in progress	Off when the update begins, then on for 0.5 seconds, then off for 0.5 seconds. The pattern repeats until the BIOS update is complete.
Video error (no add-in graphics card installed)	On-off (1.0 second each) two times, then 2.5-second pause (off), entire pattern repeats (blink and pause) until the system is powered off.	For processors requiring an add-in graphics card
Memory error	On-off (1.0 second each) three times, then 2.5-second pause (off), entire pattern repeats (blinks and pause) until the system is powered off.
Thermal trip warning	Each beep will be accompanied by the following blink pattern: .25 seconds on, .25 seconds off, .25 seconds on, .25 seconds off. This will result in a total of 16 blinks.

4.4 BIOS Error Messages

Table 41 lists the error messages and provides a brief description of each.

Table 41. BIOS Error Messages

Error Message	Explanation
CMOS Battery Low	The battery may be losing power. Replace the battery soon.
CMOS Checksum Bad	The CMOS checksum is incorrect. CMOS memory may have been corrupted. Run Setup to reset values.
Memory Size Decreased	Memory size has decreased since the last boot. If no memory was removed, then memory may be bad.
No Boot Device Available	System did not find a device to boot.

4.5 Port 80h POST Codes

During the POST, the BIOS generates diagnostic progress codes (POST codes) to I/O port 80h. If the POST fails, execution stops and the last POST code generated is left at port 80h. This code is useful for determining the point where an error occurred.

Displaying the POST codes requires a Conventional PCI bus add-in card, often called a POST card. The POST card can decode the port and display the contents on a medium such as a seven-segment display.

NOTE

The POST card must be installed in the Conventional PCI bus connector.

The following tables provide information about the POST codes generated by the BIOS:

Table 42 lists the Port 80h POST code ranges
Table 43 lists the Port 80h POST codes themselves
Table 44 lists the Port 80h POST sequence

NOTE

In the tables listed above, all POST codes and range values are listed in hexadecimal.

Table 42. Port 80h POST Code Ranges

Range	Subsystem
0x00 – 0x05	Entering SX states S0 to S5.
0x10, 0x20, 0x30, 0x40, 0x50	Resuming from SX states. 0x10 –0x20 – S2, 0x30 – S3, etc.
0x08 – 0x0F	Security (SEC) phase
0x11 – 0x1F	PEI phase pre MRC execution
0x21 – 0x29	MRC memory detection
0x2A – 0x2F	PEI phase post MRC execution
0x31 – 0x35	Recovery
0x36 – 0x3F	Platform DXE driver
0x41 – 0x4F	CPU Initialization (PEI, DXE, SMM)
0x50 – 0x5F	I/O buses: PCI, USB, ATA etc. 0x5F is an unrecoverable error. Start with PCI.
0x60 – 0x6F	BDS
0x70 – 0x7F	Output devices: All output consoles.
0x80 – 0x8F	For future use
0x90 – 0x9F	Input devices: Keyboard/Mouse.
0xA0 – 0xAF	For future use
0xB0 – 0xBF	Boot devices: Includes fixed media and removable media. Not that critical since consoles should be up at this point.
0xC0 – 0xCF	For future use
0xD0 – 0xDF	For future use
0xF0 – 0xFF

Table 43. Port 80h POST Codes

Port 80 Code	Progress Code Enumeration
	ACPI S States
0x00,0x01,0x02,0x03,0x04,0x05	Entering S0, S2, S3, S4, or S5 state
0x10,0x20,0x30,0x40,0x50	Resuming from S2, S3, S4, S5
	Security Phase (SEC)
0x08	Starting BIOS execution after CPU BIST
0x09	SPI prefetching and caching
0x0A	Load BSP microcode
0x0B	Load APs microcodes
0x0C	Platform program baseaddresses
0x0D	Wake up all APs
0x0E	Initialize NEM
0x0F	Pass entry point of the PEI core
	PEI before MRC
	PEI Platform driver
0x11	Set bootmode, GPIO init
0x12	Early chipset register programming including graphics init
0x13	Basic PCH init, discrete device init (1394, SATA)
0x14	LAN init
0x15	Exit early platform init driver
	PEI SMBUS
0x16	SMBUSriver init
0x17	Entry to SMBUS execute read/write
0x18	Exit SMBUS execute read/write
	PEI CK505 Clock Programming
0x19	Entry to CK505 programming
0x1A	Exit CK505 programming
	PEI Over-Clock Programming
0x1B	Entry to entry to PEI over-clock programming
0x1C	Exit PEI over-clock programming
	Memory
0x21	MRC entry point
0x23	Reading SPD from memory DIMMs
0x24	Detecting presence of memory DIMMs
0x27	Configuring memory
0x28	Testing memory
0x29	Exit MRC driver
	PEI after MRC
0x2A	Start to Program MTRR Settings
0x2B	Done Programming MTRR Settings

continued

Port 80 Code	Progress Code Enumeration
	PEIMs/Recovery
0x31	Crisis Recovery has initiated
0x33	Loading recovery capsule
0x34	Start recovery capsule/ valid capsule is found
	CPU Initialization
	CPU PEI Phase
0x41	Begin CPU PEI Init
0x42	XMM instruction enabling
0x43	End CPU PEI Init
	CPU PEI SMM Phase
0x44	Begin CPU SMM Init smm relocate bases
0x45	Smm relocate bases for APs
0x46	End CPU SMM Init
	CPU DXE Phase
0x47	CPU DXE Phase begin
0x48	Refresh memory space attributes according to MTRRs
0x49	Load the microcode if needed
0x4A	Initialize strings to HII database
0x4B	Initialize MP support
0x4C	CPU DXE Phase End
	CPU DXE SMM Phase
0x4D	CPU DXE SMM Phase begin
0x4E	Relocate SM bases for all APs
0x4F	CPU DXE SMM Phase end
	I/O BUSES
0x50	Enumerating PCI buses
0x51	Allocating resources to PCI bus
0x52	Hot Plug PCI controller initialization
	USB
0x58	Resetting USB bus
0x59	Reserved for USB
	ATA/ATAPI/SATA
0x5A	Resetting PATA/SATA bus and all devices
0x5B	Reserved for ATA

continued

Port 80 Code	Progress Code Enumeration
	BDS
0x60	BDS driver entry point initialize
0x61	BDS service routine entry point (can be called multiple times)
0x62	BDS Step2
0x63	BDS Step3
0x64	BDS Step4
0x65	BDS Step5
0x66	BDS Step6
0x67	BDS Step7
0x68	BDS Step8
0x69	BDS Step9
0x6A	BDS Step10
0x6B	BDS Step11
0x6C	BDS Step12
0x6D	BDS Step13
0x6E	BDS Step14
0x6F	BDS return to DXE core (should not get here)
	Keyboard (PS/2 or USB)
0x90	Resetting keyboard
0x91	Disabling the keyboard
0x92	Detecting the presence of the keyboard
0x93	Enabling the keyboard
0x94	Clearing keyboard input buffer
0x95	Instructing keyboard controller to run Self Test (PS/2 only)
	Mouse (PS/2 or USB)
0x98	Resetting mouse
0x99	Detecting mouse
0x9A	Detecting presence of mouse
0x9B	Enabling mouse
	Fixed Media
0xB0	Resetting fixed media
0xB1	Disabling fixed media
0xB2	Detecting presence of a fixed media (IDE hard drive detection etc.)
0xB3	Enabling/configuring a fixed media

continued

Port 80 Code	Progress Code Enumeration
	Removable Media
0xB8	Resetting removable media
0xB9	Disabling removable media
0xBA	Detecting presence of a removable media (IDE, CDROM detection etc.)
0xBB	Enabling/configuring a removable media
	DXE Core
0xE4	Entered DXE phase
	BDS
0xE7	Waiting for user input
0xE8	Checking password
0xE9	Entering BIOS setup
0xEB	Calling Legacy Option ROMs
	Runtime Phase/EFI OS Boot
0xF8	EFI boot service ExitBootServices ( ) has been called
0xF9	EFI runtime service SetVirtualAddressMap ( ) has been called

Table 44. Typical Port 80h POST Sequence

POST Code	Description
21	Initializing a chipset component
22	Reading SPD from memory DIMMs
23	Detecting presence of memory DIMMs
25	Configuring memory
28	Testing memory
34	Loading recovery capsule
E4	Entered DXE phase
12	Starting application processor initialization
13	SMM initialization
50	Enumerating PCI buses
51	Allocating resourced to PCI bus
92	Detecting the presence of the keyboard
90	Resetting keyboard
94	Clearing keyboard input buffer
95	Keyboard Self Test
EB	Calling Video BIOS
58	Resetting USB bus
5A	Resetting PATA/SATA bus and all devices
92	Detecting the presence of the keyboard
90	Resetting keyboard
94	Clearing keyboard input buffer
5A	Resetting PATA/SATA bus and all devices
28	Testing memory
90	Resetting keyboard
94	Clearing keyboard input buffer
E7	Waiting for user input
01	INT 19
00	Ready to boot

Notes, Cautions, and Warnings

Other Common Notation

1.1 Overview

1.1.1 Feature Summary

Table 1. Feature Summary (continued)

1.1.2 Board Layout

Table 2. Components Shown in Figure 1

1.1.3 Block Diagram

1.2 Legacy Considerations

1.3 Online Support

1.4 Processor

NOTE

1.5 Intel® Q67 Express Chipset

1.6 System Memory

NOTE

Table 3. Supported Memory Configurations

1.6.1 Memory Configurations

1.7 Graphics Subsystem

1.7.1 Integrated Graphics

NOTE

NOTE

1.7.1.1 Analog Display (VGA)

1.7.1.2 Digital Visual Interface (DVI-D)

1.7.2 PCI Express x16 Graphics

1.8 USB

NOTES

1.9 SATA Interfaces

1.9.1.1 Serial ATA RAID

NOTE

1.9.1.2 Intel® Rapid Recover Technology

1.10Legacy I/O Controller

1.10.1 Serial Port

1.11Audio Subsystem

1.11.1 Audio Subsystem Software

1.11.2 Audio Headers and Connectors

1.11.2.1 Analog Audio Connectors

Figure 4. Back Panel Audio Connector Options

1.11.2.2 S/PDIF Header

1.11.2.3 Internal Mono Speaker Header

1.12LAN Subsystem

1.12.1 Intel® 82579LM Gigabit Ethernet Controller

1.12.2 LAN Subsystem Software

1.12.3 RJ-45 LAN Connector with Integrated LEDs

Figure 5. LAN Connector LED Locations

Table 4. LAN Connector LED States

1.13Real-Time Clock Subsystem

NOTE

1.14Thermal Monitoring

1.15Platform Management and Security

1.15.1 Hardware Management Subsystem

1.15.2 Hardware Monitoring

1.15.2.1 Fan Monitoring

1.15.2.2 Chassis Intrusion and Detection

1.15.3 Intel® vPro™ Technology

(Intel® AMT)

NOTE

1.15.3.1.1 Intel AMT Features

NOTE

1.15.3.1.2 Intel AMT Software and Drivers

1.15.3.2 Intel® Virtualization Technology (Intel® VT)

NOTE

1.15.3.3 Intel® Trusted Execution Technology (Intel® TXT)

NOTE

(Intel® VT-d)

NOTE

1.15.3.5 Intel® Fast Call for Help (Intel® FCFH)

1.16Power Management

1.16.1 ACPI

Table 5. Effects of Pressing the Power Switch

1.16.1.1 System States and Power States

Table 6. Power States and Targeted System Power

NOTE

1.16.1.2 Wake-up Devices and Events

NOTE

1.16.2 Hardware Support

CAUTION

NOTE

1.16.2.1 Power Connector

1.16.2.2 Fan Headers

CAUTION

1.5 Intel^® Q67 Express Chipset

1.9.1.2 Intel^® Rapid Recover Technology

1.12.1 Intel^® 82579LM Gigabit Ethernet Controller

1.15.3 Intel^® vPro™ Technology

(Intel^® AMT)

1.15.3.2 Intel^® Virtualization Technology (Intel^®VT)

1.15.3.3 Intel^® Trusted Execution Technology (Intel^®TXT)

(Intel^®VT-d)

1.15.3.5 Intel^® Fast Call for Help (Intel^® FCFH)

2.4 Intel^® Management Engine BIOS Extension (Intel^® MEBX) Reset Header